The phase-locked loop (PLL) has for many years been the technique-of-choice for estimating received carrier phase in coherent m-ary phase-shift keyed (MPSK) communications systems. With advances in technology and the proliferation of burst communications systems, block phase estimators (BPE), began to be used to avoid xe2x80x9chang-upxe2x80x9d problems encountered during PLL signal acquisition. The BPE for higher order modulations must be preceded by a nonlinearity to remove the effects of modulation, and is followed by a xe2x80x9csector trackingxe2x80x9d algorithm to maintain the full range of the output phase estimate. This configuration is susceptible to xe2x80x9csector slipsxe2x80x9d just as a PLL experiences xe2x80x9ccycle slipsxe2x80x9d.
The object of the invention is to provide an improved block phase estimator. More particularly, an object of the invention is to provide a threshold extension block phase estimator (TEBPE) which gives improved performance over existing BPE algorithms in the presence of noise. Specifically, the threshold and sector slip performance is superior to that of previously disclosed algorithms. This can be of crucial advantage in coded systems. Another attribute of the TEBPE is it can be configured as a hybrid feedback loop incorporating characteristics of both the BPE and the PLL. This gives a high degree of flexibility with very fast acquisition times at high signal-to-noise ratio (SNR), and improved threshold performance at low SNR.